PG Programme • 24 Months • NIRF #81 Overall
M.Tech VLSI Design
Sri Sivasubramaniya Nadar College of Engineering, Kalavakkam
Batch Size
Tiny cohort = more facetime with profs and better lab access.
Key numbers
Placement Rate
80%
Average CTC
₹7.2 LPA
Total Fees
₹3.0 L
NIRF (Overall)
#81
Investment
₹3.0L total
~₹1.5L per year
- Tuition Fee (Year 1)₹1,50,000
- Tuition Fee (Year 2)₹1,50,000
Are you eligible?
Academic Background
B.E./B.Tech in ECE, EEE, or related branches.
Entrance exams
Placement · 2025
Where graduates land
Placement rate
80%
Top recruiters
Heads up: Data confidence is moderate
Our confidence score for this programme is 40/100. Some numbers might be estimates or outdated—ping SSN’s admissions office to verify the latest stats before you commit.
The verdict
Strong fit
If you're chasing a core semiconductor career and want to keep fees low, this is a strong pick. Total fee is just ₹3 lakh, the 2025 placement rate is 80%, and the recruiter roster includes Intel, Texas Instruments, and Qualcomm. The 18-seat batch size is a hidden bonus for hands-on lab work. Just confirm the latest intake details and lab infrastructure directly with the college since our data confidence is moderate.
Matches what you said
- ✓ Affordable fees
- ✓ Core chip design careers
- ✓ Intimate cohort size
Doesn't match
- ✗ High data transparency
- ✗ Large software alumni network